Design complexities and time-to-market pressures compel companies to find innovative ways to leverage available resources. Cloud computing provides a scalable and sustainable platform that can significantly improve runtimes in demanding EDA compute tasks like Calibre PERC reliability verification flows. We demonstrate how companies can use cloud resources to increase productivity and expedite turnaround-times, then use that data to understand the cost/benefit relationship of cloud computing and determine the optimal configuration that provides the greatest returns.

In today’s fast-moving industrial and consumer products, integrated circuit (IC) design companies know that getting their designs to market on or ahead of schedule is crucial to maintaining or gaining competitive success. However, they also know that the performance of their products after they hit the market is equally critical. Getting a product to market, only to have it fail to deliver the performance or product life the advertising promised, is the nightmare companies never want to have.

For that reason, reliability verification is now an essential part of the IC design and verification flow. The scope and complexity of reliability issues, such as electrostatic discharge (ESD) and latch-up protection, has grown substantially as designs moved to the most advanced process nodes (figure 1). In response, most foundries now provide some form of reliability design rules, which are enabled by electronic design automation (EDA) companies in the form of automated reliability verification tools and checks [1-3].

Figure 1. Growth in check count complexity and ESD path density over process nodes.

Of course, like every other form of automated IC design verification, running reliability verification flows requires time and resources…sometimes more than a company has available. Not every company has the ability to acquire and manage enough on-site compute resources to keep reliability verification flows on schedule. Fortunately, now there’s another answer—cloud computing.

Using 3rd-party cloud computing resources to satisfy “peak demand” periods when validating a full chip with foundry rule decks is a scalable and sustainable approach to timely reliability verification. However, companies need a clear understanding of the requirements, limitations, and costs of cloud computing to make intelligent cost/benefit decisions when adopting a cloud technology option.

When using cloud servers, companies are charged based on the number of servers used, the class of the machine, and the total usage time. The optimal number of cloud servers to use and their configurations depend on the types of the reliability verification flows you’re running, the EDA tool you’re using, the size of the design, your tapeout timeline, and how much money your company is willing or able to spend on cloud access [4].

To demonstrate the potential benefits of running reliability verification flows in the cloud, we ran a series of experiments on a full-chip system-on-chip (SoC) design, using the Siemens EDA Calibre PERC reliability verification flows with a major commercial cloud service provider. We ran the same Calibre PERC flow (using the same SoC design and rule decks) a total of three times on different numbers of cloud servers:

• 1 cloud server with 16 physical cores using Calibre multi-threaded (MT) technology


• 5 cloud servers, each with 16 physical cores, using Calibre flexible MT (MTflex) technology. The 5 servers were organized as 1 primary + 4 remotes in the Calibre MTflex configuration.


• 51 cloud servers, each with 16 physical cores, using Calibre MTflex technology. The 51 servers were organized as 1 primary + 50 remotes in the Calibre MTflex configuration.

We recorded the runtime for each flow and compared the results, as shown in figure 2. For 1 server, 5 servers, and 51 servers, the Calibre PERC run completed in 106 hours, 31 hours, and 9.5 hours respectively. In addition, memory for each of the MTflex runs was reduced by 10% compared to the single machine MT run.

Figure 2. Calibre PERC runtime comparisons for different cloud configurations.

Using the Calibre PERC reliability platform for this particular design and set of checks, a company willing to spend 3X the cost on cloud hardware could achieve about a 3X runtime improvement. Within many fabless SoC design companies, turning a multi-day Calibre PERC flow into an overnight run is of immense business value, particularly when they know multiple iterations will be required.

Of course, the actual ratio between the cost and runtime improvements will be different between companies, and even between designs and process nodes. Ultimately, running reliability verification flows on cloud hardware resources to satisfy peak demand usage can increase productivity and expedite turnaround-times, but each company must develop its own set of data that will enable it to make practical cloud computing decisions that best benefit the business goals of that company.

For more information, download a copy of our technical paper,

References

• Yan, “Ensuring Robust ESD Protection in IC Designs”, Siemens Digital Industries Software, 2017.


• EDA Tool Working Group (ESD Association), “ESD Association Technical Report”, ESD TR18.0-01-14.


• Yan, “Checking ESD Path Resistance in IC Designs”, Siemens Digital Industries Software, 2020.


• ElSewefy, “Calibre in the Cloud: Unlocking massive scaling and cost efficiencies,” Siemens Digital Industries Software, 2019.

Authors

Matthew Hogan is a product management director for Calibre Design Solutions at Siemens EDA, a part of Siemens Digital Industries Software. With more than two decades of design, field, and product development experience, Matthew works with companies that have an interest in reliability verification and the Calibre® PERC reliability platform. He is an active member of the International Integrated Reliability Workshop (IIRW), served previously on the Board of Directors for the ESD Association (ESDA), contributes to multiple working groups for the ESDA, and is a past general chair of the International Electrostatic Discharge Workshop (IEW). Matthew is also a Senior Member of IEEE, and a member of ACM. He holds a B. Eng. from the Royal Melbourne Institute of Technology, and an MBA from Marylhurst University. Matthew can be reached at [email=matt.hogan@siemens.com]matt.hogan@siemens.com[/email].

Derong Yan is a principal product engineer in the Calibre Design Solutions division of Siemens EDA, a part of Siemens Digital Industries Solutions. His primary focus is the Calibre PERC reliability platform and reliability verification strategy. Areas of expertise include SoC physical design and verification, reliability verification, and design automation. Before joining Siemens, Derong worked for multiple semiconductor companies. He holds a Ph.D. in Materials Engineering from the University of Alberta, and received both his M.Sc. and B.Sc. from Shanghai Jiao Tong University. Derong can be reached at [email=derong.yan@siemens.com]derong.yan@siemens.com[/email].

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